Cadence Innvous导出GDS没有STDCELL/IO/NET/VIA问题的解决方法
Cadence Innvous导出GDS之后,可以重新导入Cadence Virtuoso进行查看。
1. Innovus设计完成后的GDS导出命令
导出gds命令:
streamOut [-help] <fileName> [-attachNetProp <string>] [-dieAreaAsBoundary] [-libName <string>] [-mapFile <string>] [-mode <string>] [-noStructureName] [-offset {x y}] [-outputMacros] [-pvs_fill] [-reportFile <string>] [-structureName <string>] [-units <integer>] [-merge <string> [-noTSV <tsv_name_list>] [-uniquifyCellNames ]] [-area {x1 y1 x2 y2} [-strict ]] [-format {stream oasis} [-outputInstanceName <string>] [-outputNetName <string>]] [-attachInstanceName <integer> | -outputInstanceName <string>] [-attachNetName <integer> | -outputNetName <string>]
-help # Prints out the command usage
# (list, required)
-area {x1 y1 x2 y2} # -area x1 y1 x2 y2 (box, optional)
-attachInstanceName # -attachInstanceName (int, optional)
-attachNetName # -attachNetName (int, optional)
-attachNetProp # -attachNetProp { {<prop_name> <attr_num>} … } (string, optional)
-dieAreaAsBoundary # output die area as boundary (bool, optional)
-format {stream oasis} # Specify tape out file format (enum, optional)
-libName # -libName libraryName (string, optional)
-mapFile # -mapFile mapFile (string, optional)
-merge # -merge {list of external Stream files} (string, optional)
-mode # -mode {ALL|FILLONLY|NOFILL|NOINSTANCES} (string, optional)
-noStructureName # merge GDSII file withOut loading design (bool, optional)
-noTSV <tsv_name_list> # A list of TSV via names that should be from merge file not be written out from design. (string, optional)
-offset {x y} # -offset x y (point, optional)
-outputInstanceName # Write the instance name string to oasis file. (string, optional)
-outputMacros # output macros (bool, optional)
-outputNetName # Write the net name string to oasis file. (string, optional)
-pvs_fill # Will merge the PVS fill data attached to the current DB (see set_pvs_fill) into the output gds file, and instantiate the
# PVS top fill cell at 0,0 R0 inside the top design cell. The PVS fill format must be ‘gds’ (see the global pvs_fill_data
# variable) (bool, optional)
-reportFile # -reportFile fileName (string, optional)
-strict # Truncate the object outside the area (bool, optional)
-structureName # top structure name (string, optional)
-uniquifyCellNames # uniquify conflict cell name in merge file (bool, optional)
-units # -units {100|200|400|800|1000|2000|4000|8000|10000|20000} (int, optional)
一般命令:
streamOut ./export/my_chip.gds \
-mapFile ./import/techfile.layermap \
-libName MY_CHIP \
-units 1000 \
-mode ALL \
-merge {./import/gds/iopin.gds \
./import/gds/scc55nll_hs_hvt.gds} \
-dieAreaAsBoundary
2. 布线和通孔无法导出的问题
导入的mapfile可能会存在问题,比如techfile.layermap
文件中各个层的定义为:
M1 drawing 41 0
M2 drawing 42 0
M3 drawing 43 0
M4 drawing 44 0
...
V1 drawing 60 0
V2 drawing 61 0
V3 drawing 62 0
V4 drawing 63 0
这个drawing标签Innovus无法识别,无法将工程文件内的Route和VIA导出,因此需要进行扩展,具体扩展方法如下:
M1 NET 41 0
M1 SPNET 41 0
M1 PIN 41 0
M1 LEFPIN 41 0
M1 FILL 41 0
M1 FILLOPC 41 0
M1 VIA 41 0
M1 VIAFILL 41 0
M1 VIAFILLOPC 41 0
M1 LEFOBS 41 0
M1 LEFOBS 41 0V1 VIA 60 0
V1 VIAFILL 60 0
V1 VIAFILLOPC 60 0
...
M1是全的,V1可能不全,但目前三个标签本人导出的时候没有问题。
接下来对比一下原来未改动的导出信息和改动后的导出信息:
#改动前
Stream Out Information Processed for GDS version 5:
Units: 1000 DBU
Object Count
----------------------------------------
Instances 67543
Ports/Pins 0
Nets 0Via Instances 0
Special Nets 0Via Instances 0
Metal Fills 0Via Instances 0
Metal FillOPCs 0Via Instances 0
Metal FillDRCs 0Via Instances 0
Text 0
Blockages 0
Custom Text 0
Custom Box 0
Trim Metal 0
# 改动后:
Stream Out Information Processed for GDS version 5:
Units: 1000 DBU
Object Count
----------------------------------------
Instances 67543
Ports/Pins 0
Nets 481548metal layer M2 307527metal layer M3 140037metal layer M4 29403metal layer M5 4581Via Instances 353389
Special Nets 804metal layer M1 762metal layer M5 20metal layer TM2 22Via Instances 14003
Metal Fills 0Via Instances 0
Metal FillOPCs 0Via Instances 0
Metal FillDRCs 0Via Instances 0
Text 0
Blockages 0
Custom Text 0
Custom Box 0
Trim Metal 0
可以发现导出时能够识别出Net和Special Net了。
3. STD Cell和IO无法导出的问题
在导出命令中添加:-merge {stdcell.gds io.gds}
。
4. Virtuoso查看方法
1、在Virtuoso CIW界面点击Import->Stream。
2、Xtream In导入设置:
3、等到Translate完成后就可以打开layout查看芯片版图了:
参考文章:
https://www.ewbang.com/community/article/details/1000203044.html
https://blog.eetop.cn/blog-1592-6946728.html